The Silicon Review
An Electronic System Level (ESL) Design start-up firm, Vayavya was founded in 2006 and headquartered at Belgaum, north-west part of Karnataka state in India. Vayavya in Sanskrit is name for the North-West direction, Vayavya Labs focuses on providing tools that enhance the productivity of embedded system designers and programmers. The company serves its customers with ESL products and Engineering Services.
ESL Tools and Methodology: Vayavya’s tools target the ‘First-Inflection-Point’ of the hardware and software designs. Current generation tools and solutions for semiconductor (IC) and software design flows have been focusing on their respective vertical domains and helping to raise the programming abstraction levels. However a need to formalize the communication between IC and software teams to bring about a greater productivity is sought by every product manager and design team.
Vayavya Labs delivers following benefits to customers:
Embedded Design Service: Vayavya also provides design services to the customers and pass on the benefits of automation tools (Vayavya Design Tools) by deploying them internally. Their core solutions and services are:
Vayavya Labs offers a suite of tools that help semiconductor & embedded design firms to reduce the time and effort involved in product design, development and testing. Their tools provide mechanisms to formally capture the ‘Design Intent’ (Specifications) of IC and Embedded Software flows.
These specifications are used as input to a set of ‘Intelligent Generators’ that help in automation of activities in design flows there by reducing the time and effort.
DDGen- Device Driver Generator(DDGen) is a software tool designed for use by Embedded System Developers and IC design engineers to automate device driver and firmware development. The tool methodology allows the user to think in problem domain rather than the implementation domain by providing means to specify:
The Device Programming Specification (DPS) which enables the formal capture of the Programming sequence of all peripheral functionality of a SoC.
The run time environment specification called RTS (Run Time Specification) which enables the capture of the software and systems specification of the driver environment.
BSPGen- Software applications are the key differentiators in today’s embedded systems. Timely availability of embedded software determines the success or failure of a product. Within the embedded software stack, the Board Support Package(BSP) is one of the most-critical components. A high quality BSP needs to be delivered early enough for rest of the embedded software to be delivered on time.
Vayavya Labs’ BSP Development Methodology delivers a BSP significantly faster than existing methodologies thus ensuring that the embedded software development and the product roll out meets the time-to-market requirements (TtM). The methodology is based on our patented device driver generation tool (DDGEN).
SOCX-Verifier- The cost of IC production at leading process nodes is rising exponentially due to increased complexity of fabrication process. The cost at 28nm is twice as much that of current nodes (45nm) therefore the stakes are high for a SoC company in releasing a faulty or under-performing IC. Hence verification process in IC development plays an important role and is of utmost importance. At present levels of IP integration, verification budget and time contribute significantly to a project cost and time, and they are projected to increase rapidly at leading process nodes.
Knowing the Leaders
RK Patil, CEO & Co-Founder – RK has over 20 years of industry experience in the domain of Telecom, Embedded software and Semiconductors. For the last eight years he was co-founder of two starts ups in the technology domain where he has held various positions in engineering, marketing and management. At Vayavya RK is responsible for overall management and strategic decisions related to engineering and business activities.
Prior to Vayavya he was part of worldwide Video Marketing team at Genesis Microchip. He was responsible for finding alternate and adjacent markets for the main line ATV and DTV ASIC solutions of the company and driving the marketing efforts to monetise the same. Prior to Genesis he co-founded Smart Yantra Technologies in 2001 which was acquired by NASDAQ listed Semiconductor firm Genesis Microchip Inc. in 2004. At Smart Yantra he was responsible for setting up Sales and Marketing of its products and services.
Prior to Smart Yantra he had a stint with Indian Air Force, Accord Software and Systems and HP in leading different engineering activities/groups. RK holds a degree in computer science from Karnataka University and diploma in Aeronautical engineering. He is also a qualified ISO 9000 series quality initiatives implementor.
Venugopal Kolathur, Chief Architect, Co-Founder- Venugopal Kolathur is responsible for product technology road-map and product design strategies. He has over 32 years of industry and academic experience. He finished his graduation and subsequently masters from REC Calicut in Instrumentation & Control Systems and served as professor in Gogte Institute of Technology (Karnataka University) for 13 years (1983-96). He has been in industry (1996-2005) working with companies like Accord Software and Systems, HP, Ishoni Networks and Orbit Software Inc. He has led various engineering teams in multiple domains ranging from embedded systems, operating systems, networking.
Uma Bondada, VP Engineering, Co-Founder- Uma Bondada is responsible for product engineering and delivery. She began her career as lecturer (1990-94) at Dayanand Sagar College of Engineering prior to moving to software industry. For last 12 years (1994-2005) and has worked in different engineering capacities at XLnet Software, HP, Orbit Software Inc. Uma’s expertise’s are in the domain of language parser, terminal firmware and mission critical back-up software. Uma holds a graduate degree in Electronics and Telecommunication from Bangalore University. Uma is an excellent team coordinator and specializes in conceptualizing and implementation of software product quality test suites.